Digital

​Digital is an easy-to-use digital logic designer and circuit simulator designed for educational purposes.

Features

These are the main features of Digital:

• Visualization of signal states with measurement graphs.
• Single gate mode to analyze oscillations.
• Analysis and synthesis of combinatorial and sequential circuits.
• Simple testing of circuits: You can create test cases and execute them to verify your design.
• Many examples: From a transmission gate D-flip-flop to a complete (simple) MIPS-like single cycle CPU.
• Includes a simple editor for finite state machines (FSM). A FSM can then be converted to a state transition table and a circuit implementing the FSM (See screenshot).
• Contains a library with the most commonly used 74xx series integrated circuits.
• Supports generic circuits. This allows the creation of circuits that can be parameterized when used. In this way, it is possible, for e.g., to create a barrel shifter with a selectable bit width.
• Good performance: The example processor can be clocked at 120 kHz.
• Supports large circuits: The "Conway's Game of Life" example consists of about 2400 active components and works just fine.
• It is possible to use custom components which are implemented in Java and packed in a jar file. See this example for details. Simple remote TCP interface which e.g. allows an assembler IDE to control the simulator.
• Components can be described using VHDL or Verilog. The open source VHDL simulator ghdl needs to be installed to simulate a VHDL defined component, and the open source Verilog simulator Icarus Verilog is required to simulate a Verilog defined component.
• A circuit can be exported to VHDL or Verilog. There is also direct support for the BASYS3 Board and the TinyFPGA BX board. See the documentation for details. The examples folder contains a variant of the example CPU, which runs on a BASYS3 board.
• Direct export of JEDEC files which you can flash to a GAL16v8 or a GAL22v10. These chips are somewhat outdated (introduced in 1985!) but sufficient for beginners exercises, easy to understand and well documented. Also the ATF150x chips are supported which offer up to 128 macro-cells and in system programming. See the documentation for details.
• SVG export of circuits, including a LaTeX/Inkscape compatible SVG version (see ctan)
• No legacy code.
• Good test coverage (about 80% Neither the GUI tests nor the HDL simulator integration tests are running on the Travis-CI build servers, so CodeCov measures only about 50%). Almost all examples contain test cases which ensure that they work correctly.

The latest changes that have not yet been released are listed in the release notes.

Setup

If you want to build Digital from the source code:

At first clone the repository.

A JDK (at least JDK 8) is required (either the Oracle JDK or OpenJDK)

Maven is used as build system, so the easiest way is to install maven.

After that you can simply run mvn install to build Digital.

Run mvn site to create a findbugs and a JaCoCo code coverage report.

Most IDEs (Eclipse, NetBeans, IntelliJ) are able to import the pom.xml to create a project.​

Link

https://github.com/hneemann/Digital